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COMe-P2020 User Guide
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After the volume is mounted, its contents can be listed:
or a file loaded, in this case “kernel.bin” to address 0x100000:
6.5.8 Using the SPI Flash for OS
The SPI flash for OS is not used together with a file system, it is used raw. It does not contain any U-Boot components and is
completely free for user usage. It's primary function is to store VxWorks® boot ROMs and images.
Before making any changes to the flashes, ensure that the correct flash is selected. To select the SPI flash for OS, execute
the “sf probe 3” command (SPI flash for OS is routed to the processor’s SPI controller chip select 3).
The SPI flash must be erased before it is programmed. To achieve this, use the “sf erase” command.
To program an image to the SPI flash, it must first be loaded to memory from an arbitrary source. It can then be pro-
grammed with the “sf write” command.
Example: Programming a test file “test.img” from an SD card using the “ext2” file system:
This example assumes that the size of “test.img” is less than 64 kB. The environment variable “filesize” is set automatically
when a file is loaded to memory and can be used for convenience here.
6.5.9 Booting an OS
6.5.9.1 Booting Linux
To boot Linux, at least a kernel image and a FDT (Flattened Device Tree) must be loaded to memory. Optionally, an “initrd”
can be loaded.
Furthermore, a command line must be prepared in the environment variable “bootargs”.
The boot itself is initiated with the “bootm” command.
To simplify the setup of the board, three predefined scripts are already programmed in the default environment:
• “nfsboot” to boot from a tftp server and mount the root over NFS
• “nandboot” to boot from the NAND flash and also mount it as root
• “sdboot” to boot from a SD Card and also mount it as root
• “multi_img_boot” to boot from the multi-image provided. The multi-image consists of a FDT, a kernel and a rootfs
=> ubifsls
=>
=> ubifsload 100000 kernel.bin
=>
=> mmc rescan 0
=> ext2load mmc 0 100000 test.img
=> sf probe 3
=> sf erase 0 10000
=> sf write 100000 0 ${filesize}
- User Guide 1
- Revision History 2
- Disclaimer 2
- Contents 3
- List of Tables 5
- List of Figures 8
- Proprietary Note 9
- Trademarks 9
- General Instructions on Usage 9
- Two Year Warranty 9
- COMe-P2020 User Guide 10
- 1Introduction 11
- 1.2 Board Diagrams 12
- 2 Functional Description 19
- • Real-Time Clock (RTC) 20
- • Timer only mode 20
- • Reset mode 20
- • Interrupt mode 20
- • Dual stage mode 20
- PIN SIGNAL 22
- TYPE TERMINATION COMMENT 22
- Connector J1 Row B Pinout 24
- Connector J2 Row C Pinout 27
- Connector J2 Row D Pinout 30
- CARRIER COMe_cP2020 36
- 3 Configuration 38
- 3.2 Board Memory Map 39
- Table 3-3: I/O Address Map 40
- 0x011: User Checksum Register 51
- 0x280: Status Register 0 53
- 0x282: Control Register 0 53
- 0x285: Reset Status Register 54
- 0x330: Power Status Register 65
- 0x338: CPU Status Register 65
- 0x339: CPU Control Register 66
- 0x33A: Board Variant Register 66
- 0x350: PCIe Status Register 66
- 4 Power Considerations 74
- 5Thermal 76
- 6 U-Boot 78
- Table 6-3: flsw Command 82
- Table 6-4: kboardinfo Command 83
- Table 6-5: md5sum Command 84
- Table 6-6: sconf Command 85
- Table 6-7: tlbdbg Command 88
- Table 6-8: vpd Command 89
- • eTSEC2 mode: RGMII 90
- • eTSEC3 mode: RGMII 90
- • Boot ROM location: SPI 90
- 6.5.3.1 sconf select 91
- 6.5.3.2 sconf set 91
- Table 6-9: Naming Conventions 98
- 7 Installation 105
- User Guide COMe-cP2020 106
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