Kontron COMe-cBT6 Manual do Utilizador Página 52

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COMe-cBT6 / Pinout List
B58 PCIE_RX3+ PCI Express Lane 3 Receive + DP-I - only available on no-LAN var.
B59 PCIE_RX3- PCI Express Lane 3 Receive - DP-I - only available on no-LAN var.
B60 GND Power Ground PWR GND - -
B61 PCIE_RX2+ PCI Express Lane 2 Receive + DP-I - -
B62 PCIE_RX2- PCI Express Lane 2 Receive - DP-I - -
B63 GPO3 General Purpose Output 3 O-3.3 PD 100k -
B64 PCIE_RX1+ PCI Express Lane 1 Receive + DP-I - -
B65 PCIE_RX1- PCI Express Lane 1 Receive - DP-I - -
B66 WAKE0# PCI Express Wake Event I-3.3 PU 10k 3.3V (S5) -
B67 WAKE1# General Purpose Wake Event I-3.3 PU 10k 3.3V (S5) -
B68 PCIE_RX0+ PCI Express Lane 0 Receive + DP-I - -
B69 PCIE_RX0- PCI Express Lane 0 Receive - DP-I - -
B70 GND Power Ground PWR GND - -
B71 LVDS_B0+ LVDS Channel B DAT0+ DP-O - -
B72 LVDS_B0- LVDS Channel B DAT0- DP-O - -
B73 LVDS_B1+ LVDS Channel B DAT1+ DP-O - -
B74 LVDS_B1- LVDS Channel B DAT1- DP-O - -
B75 LVDS_B2+ LVDS Channel B DAT2+ DP-O - -
B76 LVDS_B2- LVDS Channel B DAT2- DP-O - -
B77 LVDS_B3+ LVDS Channel B DAT3+ DP-O - -
B78 LVDS_B3- LVDS Channel B DAT3- DP-O - -
B79 LVDS_BKLT_EN Panel Backlight On O-3.3 PD 100k -
B80 GND Power Ground PWR GND - -
B81 LVDS_B_CK+ LVDS Channel B Clock+ DP-O - -
B82 LVDS_B_CK- LVDS Channel B Clock- DP-O - -
B83 LVDS_BKLT_CTRL Backlight Brightness Control O-3.3 - -
B84 VCC_5V_SBY 5V Standby PWR 5V (S5) - optional (not neccessary in single supply mode)
B85 VCC_5V_SBY 5V Standby PWR 5V (S5) - optional (not neccessary in single supply mode)
B86 VCC_5V_SBY 5V Standby PWR 5V (S5) - optional (not neccessary in single supply mode)
B87 VCC_5V_SBY 5V Standby PWR 5V (S5) - optional (not neccessary in single supply mode)
B88 BIOS_DIS1# BIOS Selection Strap 1 I-3.3 PU 10k 3.3V (SPI) PU might be powered during suspend
B89 CRT_RED CRT_RED / Analog Video RGB-RED OA PD 150R -
B90 GND Power Ground PWR GND - -
B91 CRT_GREEN CRT_GREEN / Analog Video RGB-GREEN OA PD 150R -
B92 CRT_BLUE CRT_BLUE / Analog Video RGB-BLUE OA PD 150R -
B93 CRT_HSYNC CRT_HSYNC / Analog Video H-Sync O-3.3 - -
B94 CRT_VSYNC CRT_VSYNC / Analog Video V-Sync O-3.3 - -
B95 CRT_DDC_CLK CRT_DDC_CLK / Display Data Channel Clock I/O-5 PU 2k21 5.0V_S0 -
B96 CRT_DDC_DATA CRT_DDC_DATA / Display Data Channel Data I/O-5 PU 2k21 5.0V_S0 -
B97 SPI_CS# SPI Chip Select O-3.3 - -
B98 RSVD Reserved for future use nc - -
B99 RSVD Reserved for future use nc - -
B100 GND Power Ground PWR GND - -
B101 FAN_PWMOUT Fan PWM Output O-3.3 - 20V protection circuit implemented on module, PD on
carrier board needed for proper operation
B102 FAN_TACHIN Fan Tach Input I-3.3 PU 47k 3.3V (S0) 20V protection circuit implemented on module
B103 SLEEP# Sleep Button Input I-3.3 PU 47k 3.3V (S5) 20V protection circuit implemented on module
B104 VCC_12V Main Input Voltage (8.5-20V) PWR 8.5-20V - -
B105 VCC_12V Main Input Voltage (8.5-20V) PWR 8.5-20V - -
B106 VCC_12V Main Input Voltage (8.5-20V) PWR 8.5-20V - -
B107 VCC_12V Main Input Voltage (8.5-20V) PWR 8.5-20V - -
B108 VCC_12V Main Input Voltage (8.5-20V) PWR 8.5-20V - -
B109 VCC_12V Main Input Voltage (8.5-20V) PWR 8.5-20V - -
B110 GND Power Ground PWR GND - -
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